VLSI CIRCUIT AND SYSTEM DESIGN

1 YEAR

II semester

9 CFU

Luca DI NUNZIO (9 cfu)	A.Y. 2021-22
Luca DI NUNZIO (5 cfu) Vittorio MELINI (2 cfu) Sergio SPANO’ (2 cfu)	since A.Y. 2022-23
Alessia DI VITO (7cfu) Gemma GELIBERTI (2cfu)	A.Y. 2025-26
	Code: 8039166 SSD: ING-INF/01

PREREQUISITES:

It is strictly suggested to take the “Digital Electronics” exam before attending this course. You can contact Prof. Luca DI NUNZIO for any doubts regarding the topic.

LEARNING OUTCOMES:

The VLSI CIRCUIT AND SYSTEM DESIGN course aims to teach the basics of combinational and sequential circuits that represent the basic blocks of any modern digital system. In addition, the course will provide the basic concepts of the VHDL language

KNOWLEDGE AND UNDERSTANDING:

At the end of the course, the student will learn the basic concepts of combinational and sequential circuits that are the basis of any system and the basic concepts of the VHDL language useful for the design of digital systems

APPLYING KNOWLEDGE AND UNDERSTANDING:

Ability to analyze the characteristics of digital circuits with particular emphasis on timing and power consumption.

MAKING JUDGEMENTS:

The student will understand the acquired knowledge independently and critically to be able to connect and integrate the various aspects related to the design of digital systems

COMMUNICATION SKILLS:

The student must be able to communicate their knowledge acquired during the course in clear, correct, and technical language.

LEARNING SKILLS:

Ability to critically approach a digital circuit design problem, know how to manage it, and find implementation solutions using the VHDL language

SYLLABUS:

(L. DI NUNZIO)

Digital electronics basic concepts
Floating-point and fixed-point numeric representation formats
Combinatorial circuits: encoders, decoders, multiplexers
Sequential circuits: flip flops, latch registers, counters, memories
Introduction to VHDL: entity and architecture, levels of abstraction, HDL design flow, combinatorial and sequential processes, objects in VHDL test bench
Practical activities of circuit design in VHDL

(S. SPANO’)

Central unit
ALU
System registers
Address logic
System buses
Scheduler
Branching of instructions
Interrupts
Bus synchronization
RAM memories
ROM memories
Flash memories
CAM memories